|
"MTX Plus+"
Firmware
MTXPlus+
incorporates three classes of
firmware :
|
ROM |
Operating System, hardware device support, etc.,
compiled from Z80 Assembler source code |
|
PLD |
Typically, a GAL22V10, used for I/O decoding etc.,
programmed using a
JEDEC
compatible compiler |
|
CPLD |
Used for complex logic and/or I/O decoding, programmed
using
Altera's Quartus II package. |
The use
of CPLDs is optional, my prototype CPU and I/O boards use them,
but Martin has chosen to only use GALs on his boards. Should a
PCB version of MTXPlus+ ever make it into production,
to minimise the component footprint and hence board size/cost,
it is likely that the design will only use CPLDs.
| Location |
PLD |
Plus . . . |
Main Functions |
|
CPU Board |
1 x EPM7128SLC84, or |
| ROM, RAM, CTC, RTC chip selects |
| Memory address line decoding |
| Page Port |
| Clock dividers for PHI, PHI4, PHI8,
Ck/32 |
|
|
3
x GAL |
|
1
x |
GAL22V10 |
|
2
x |
GAL16V8 |
|
|
|
I/O Board |
1 x EPM7128SLC84, or |
| I/O port decoding (keyboard, joysticks,
printer, CF) |
| Keyboard drive lines |
| Keyboard sense lines, Printer Status |
| Printer Status |
| Printer Control |
| |
|
|
|
|
1
x |
74HC273 |
|
2
x |
74HC244 |
| 1 x |
74HC374 |
| 1 x |
74HC74 |
| 1 x |
74HC04 |
|
| 1 x EPM7160SLC84 |
Optional - PS/2 Keyboard Interface |
|
Video Board |
|
|
| I/O port decoding (video, sound) |
| Automatic Wait State Generation for VDP |
|
Additional details of the specific functions
can be found by following the links on the menu on the left
hand side of the page.
|
