| Motherboard |
|---|
| 00 | -O | IOBYTE: Memory control:
| Bit | Function |
| 0-3 | RAM page address |
| 4-6 | ROM page address |
| 7 | 0 = ROM based system, 1 = RAM based system |
|
| 00 | I- | Printer strobe |
| 01 | IO | VDP data |
| 02 | -O | VDP control |
| 02 | I- | VDP status |
| 03 | -O | Tape output:
| Bit | Function |
| 0 | Output to tape |
| 1-7 | Reserved |
|
| 03 | I- | Sound strobe, motherboard doesn't drive bus, REMEMOTECH and REMEMOrizer drive the value 03 |
| 04 | -O | Printer data output |
| 04 | I- | Printer status:
| Bit | Function |
| 0 | Printer busy (active high) |
| 1 | Printer error (active low) |
| 2 | Paper empty (active high) |
| 3 | Printer selective (active high) |
| 4-7 | Reserved |
|
| 05 | -O | Keyboard drive |
| 05 | I- | Keyboard sense |
| 06 | I- | Keyboard sense:
| Bit | Function |
| 0-1 | Two most significant keyboard sense lines |
| 2-3 | Country code |
| 4-7 | Reserved |
|
| 06 | -O | Sound |
| 07 | IO | PIO |
| 08 | IO | CTC channel 0 |
| 09 | IO | CTC channel 1 |
| 0A | IO | CTC channel 2 |
| 0B | IO | CTC channel 3 |
| RS232 |
|---|
| 0C | IO | DART |
| 0D | IO | DART |
| 0E | IO | DART |
| 0F | IO | DART |
| SDX Floppy Disc Controller |
|---|
| 10 | -O | FDC command |
| 10 | I- | FDC status:
| Bit | Function |
| 0 | Busy |
| 1 | Index / DRQ |
| 2 | Track 00 / Lost data |
| 3 | CRC error |
| 4 | Seek error / Not found |
| 5 | Head loaded / Deleted data |
| 6 | Write protect |
| 7 | Not ready |
|
| 11 | IO | FDC track |
| 12 | IO | FDC sector |
| 13 | IO | FDC data |
| 14 | -O | Drive control:
| Bit | Function |
| 0 | 0 = Drive 0, 1 = Drive 1 |
| 1 | 0 = Side 0, 1 = Side 1 |
| 2 | Motor On |
| 3 | Motor Ready |
| 4 | 0 = Single density, 1 = Double density |
| 5-7 | Reserved |
|
| 14 | I- | Drive status:
| Bit | Function |
| 0 | 0 = Head load, 1 = No Head Load |
| 1 | 0 = Double sided, 1 = Single sided |
| 2 | 0 = 80 Tracks, 1 = 40 Tracks |
| 3 | 0 = 2 Drives, 1 = 1 Drive |
| 4 | Link |
| 5 | Ready |
| 6 | INT |
| 7 | DRQ |
|
| Cassette controller |
|---|
| 1F | -O | Cassette start/stop |
| MFX Video (FPGA v2.00 or higher) |
|---|
| 28 | -O | Set low byte of VRAM copy count and initiate copy |
| 28 | I- | Read low byte of outstanding copies |
| 29 | -O | Set high byte of VRAM copy count |
| 29 | I- | Read high byte of outstanding copies |
| 2A | IO | Low byte of VRAM copy source address |
| 2B | IO | High byte of VRAM copy source address |
| 2C | IO | Low byte of VRAM target address. Writing to this port resets the address increment to one |
| 2D | IO | High byte of VRAM target address. Writing to this port resets the address increment to one |
| 2E | -O | Write byte at VRAM target address and increment the target address |
| 2E | I- | Read byte at VRAM target address and increment the target address |
| 2F | -O | Set the address increment for read, write and copy operations |
| 2F | I- | Read byte at VRAM target address without changing the address |
| 31 | -O | Address high & Write enable bits:
| Bit | Function |
| 0-3 | Bits 11-8 of character address |
| 4 | Enable write of second attribute |
| 5 | Enable write of first attribute |
| 6 | Enable write of character code |
| 7 | 0 = Read data, 1 = Write data |
|
| 80 column & MFX (all versions) |
|---|
| 30 | I- | Ring the bell (FDX only) |
| 30 | -O | Address low. Writing to this address triggers a character read or write |
| 31 | -O | Address high & Write enable bits:
| Bit | Function |
| 0-3 | Bits 11-8 of character address |
| 4 | Reserved (Enable write of second attribute for MFX FPGA v2.00 or higher) |
| 5 | Enable write of first attribute |
| 6 | Enable write of character code |
| 7 | 0 = Read data, 1 = Write data |
|
| 32 | IO | Character data |
| 33 | IO | Attribute data |
| 38 | IO | 80-Column control register select (See table below) |
| 39 | IO | 80-Column control register data |
| MFX (all versions) |
|---|
| 34 | IO | 80-column repeat count. Writing to this address generates the specified
number of repeats of the last character written |
| 35 | -O | Initialise location in FPGA read only serial number register |
| 35 | I- | Read serial number register (auto increments location)
| Offset | Function |
| 0 | Owner Initial 1 (ASCII) |
| 1 | Owner Initial 2 (ASCII) |
| 2 | Serial Number (BCD) |
| 3 | PCB Major Version (BCD) |
| 4 | PCB Minor Version (BCD) |
| 5 | FPGA Major Version (BCD) |
| 6 | FPGA Minor Version (BCD) |
| 7 | (not used) (Byte) |
|
| 38 | IO | 80-Column control register select (See table below) |
| 39 | IO | 80-Column control register data |
| 3A | IO | FPGA control register:
| Bit | Function |
| 0 | Enable multiple character write |
| 1 & 2 | Reserved |
| 3 | Enable hum bars |
| 4 | VGA frequency: 0 = 50Hz, 1 = 60Hz |
| 5 | Colour palette: 0 = Retro, 1 = Vivid |
| 6 | Select display: 0 = 80-column, 1 = VDP |
| 7 | Enable disk activity display |
|
| 3B | I- | Read value of memory page port |
| MFX Video (FPGA v2.00 or higher) |
|---|
| 36 | -O | Select character for font read / write.
Sets the font pointer to the first row of the character |
| 36 | I- | Character currently being read / updated |
| 37 | IO | Reads / sets pixels for one row of current character.
The font pointer is advanced to the next row (top to bottom) after the read or write.
After the last row the pointer is advanced to the next character |
| 3C | IO | Index into colour palette |
| 3D | IO | Red (bits 0-3) and green (bits 4-7) components of selected palette colour |
| 3E | IO | Blue (bits 0-3) component of selected palette colour |
| 3F | IO | Second attribute byte for character |
| FDX Floppy Disc Controller |
|---|
| 40 | -O | FDC command |
| 40 | I- | FDC status |
| 41 | IO | FDC track |
| 42 | IO | FDC sector |
| 43 | IO | FDC data |
| 44 | IO | FDC control/status port |
| 45 | IO | FDC drive change |
| 46 | IO | FDC DMA low |
| 47 | IO | FDC DMA high |
| Silicon Disc |
|---|
| 50 | IO | F: sector address low |
| 51 | IO | F: sector address high |
| 52 | IO | F: MEMU Huge Silicon Disc: sector address
highest |
| 53 | IO | F: data |
| 54 | IO | G: sector address low |
| 55 | IO | G: sector address high |
| 56 | IO | G: MEMU Huge Silicon Disc: sector address
highest |
| 57 | IO | G: data |
| 58 | IO | H: sector address low |
| 59 | IO | H: sector address high |
| 5A | IO | H: MEMU Huge Silicon Disc: sector address
highest |
| 5B | IO | H: data |
| 5C | IO | I: sector address low |
| 5D | IO | I: sector address high |
| 5E | IO | I: MEMU Huge Silicon Disc: sector address
highest |
| 5F | IO | I: data |
| CFX-II Video |
|---|
| 60 | -O | Output characters, control and escape sequences to 80-column display |
| 60 | I- | Test space available in CFX-II output buffer |
| 61 | -O | Control access to CFX-II internal memory. Writing 0xFF resets |
| 61 | I- | Read back contents of CFX-II internal memory |
| Compact Flash (CFX, MTXplus+) |
|---|
| 6C | IO | 82C55 PPI, PIO port A, IDE data bus, lower 8 bits |
| 6D | IO | 82C55 PPI, PIO port B, IDE data bus, upper 8 bits |
| 6E | -O | 82C55 PPI, PIO port C, IDE control lines
| Bit | Function |
| 0-2 | IDC Address lines |
| 3 | IDC Chip Select 0 (Inverted) |
| 4 | IDC Chip Select 1 (Inverted) |
| 5 | IDC Write (Inverted) |
| 6 | IDC Read (Inverted) |
| 7 | IDC Reset (Inverted) |
|
| 6F | -O | 82C55 PPI, PIO control register |
| DS12887 Real Time Clock (MTXplus+) |
|---|
| 70 | -O | DS12887 address register |
| 71 | IO | DS12887 data register |
| MFX (FPGA v4.00 or higher) |
|---|
| 70 | -O | DS 3231 Real Time Clock address register |
| 71 | IO | DS 3231 Real Time Clock data register |
| 72 | -O | I2C command port:
| 1 = Read RTC data |
| 2 = Write RTC data | |
| 72 | I- | I2C status port:
| Bit | Function |
| 0 | Busy |
| 1-6 | Reserved |
| 7 | Error |
|
| 73 | -O | Writes data to 1KB memory buffer.
Auto-increments write address.
Resets read address. |
| 73 | -I | Reads data from 1KB memory buffer.
Auto-increments read address.
First read after a write is stale and should be discarded.
Resets the write address. |
| Ethernet (MFX (all versions) & NFX) |
|---|
| 90 | -O | WIZnet W5100 control |
| 91 | -O | WIZnet W5100 address (high) |
| 92 | -O | WIZnet W5100 address (low) |
| 93 | IO | WIZnet W5100 data |
| MFX (FPGA v4.00 or higher), REMEMOrizer r3 and REMEMOTECH r2 Accelerator extras |
|---|
| A0 | IO | Read / write top of stack - Mantissa bits 0 to 7 (lsb) |
| A1 | IO | Read / write top of stack - Mantissa bits 8 to 15 |
| A2 | IO | Read / write top of stack - Mantissa bits 16 to 23 |
| A3 | IO | Read / write top of stack - Sign bit (bit 7) and mantissa bits 24 to 30.
Mantissa bit 31 = 1 |
| A4 | IO | Read / write top of stack - Exponent |
| A5 | -O | Command:
| Value | Meaning |
| 0x00 | Initialise |
| 0x01 | Push zero onto top of stack |
| 0x02 | Push a second copy of top of stack |
| 0x03 | Pop value from top of stack |
| 0x04 | Exchange top of stack and next of stack |
| 0x05 | Push a copy of next of stack |
| 0x06 | Set OK status |
| 0x10 | Load integer 1 on top of stack (replaces previous value) |
| 0x20 | 32 bit integer negation |
| 0x21 | 32 bit integer bitwise not |
| 0x22 | 32 bit integer logical shift left |
| 0x23 | 32 bit integer logical shift right |
| 0x24 | 32 bit integer arithmetic shift right |
| 0x25 | 32 bit integer absolute value |
| 0x26 | 32 bit sign (result is -1, 0 or 1) |
| 0x30 | 32 bit integer addition |
| 0x31 | 32 bit integer subtraction |
| 0x32 | 32 bit integer unsigned multiplication |
| 0x33 | 32 bit integer signed multiplication |
| 0x34 | 32 bit integer unsigned division |
| 0x35 | 32 bit integer signed division |
| 0x36 | 32 bit integer unsigned modulus |
| 0x37 | 32 bit integer signed modulus |
| 0x38 | Push bits 32 to 63 of multiply result to top of stack |
| 0x40 | Load 1.0 on top of stack (replaces previous value) |
| 0x41 | Load 2.0 on top of stack |
| 0x42 | Load 10.0 on top of stack |
| 0x43 | Load pi on top of stack |
| 0x44 | Load pi/2 on top of stack |
| 0x45 | Load 2pi on top of stack |
| 0x46 | Load 1/2 on top of stack |
| 0x47 | Load 1/3 on top of stack |
| 0x48 | Load 1/5 on top of stack |
| 0x49 | Load 1/7 on top of stack |
| 0x4A | Load 1/9 on top of stack |
| 0x4B | Load 1/11 on top of stack |
| 0x4C | Load 1/13 on top of stack |
| 0x4D | Load 1/15 on top of stack |
| 0x4E | Load 1/17 on top of stack |
| 0x4F | Load 1/3! on top of stack |
| 0x50 | Load 1/4! on top of stack |
| 0x51 | Load 1/5! on top of stack |
| 0x52 | Load 1/6! on top of stack |
| 0x53 | Load 1/7! on top of stack |
| 0x54 | Load 1/8! on top of stack |
| 0x55 | Load 1/9! on top of stack |
| 0x56 | Load 1/11! on top of stack |
| 0x57 | Load 1/13! on top of stack |
| 0x58 | Load log_2(e) on top of stack |
| 0x59 | Load log_e(2) on top of stack |
| 0x60 | Floating point negation |
| 0x61 | Floating point absolute value |
| 0x62 | Floating point sign |
| 0x63 | Round to integer value (towards zero) |
| 0x70 | Floating point addition |
| 0x71 | Floating point subtraction |
| 0x72 | Floating point multiplication |
| 0x73 | Floating point division |
| 0x80 | 32 bit unsigned integer to floating point |
| 0x81 | Floating point to 32-bit unsigned integer |
The arithmetic accelerator has a 10 deep stack.
Unitary operations are performed on the top of stack with the value replaced by the result.
Binary operations pop the two arguments from the top of stack and push the result. |
| A5 | I- | Result:
| Value | Meaning |
| 0 | Busy |
| 1 | OK |
| 2 | Divide by zero |
| 3 | Overflow |
| 4 | Underflow |
|
| CFX-II Compact Flash |
|---|
| B0 | IO | Data Register (IDC register 0) |
| B1 | -O | Feature Register (IDC Register 1) |
| B1 | I- | Error Register (IDC Register 1) |
| B2 | -O | Count Register (IDC Register 2) |
| B3 | -O | LBA low (IDC Register 3) |
| B4 | -O | LBA mid (IDC Register 4) |
| B5 | -O | LBA high (IDC Register 5) |
| B6 | -O | LBA top (IDC Register 6) |
| B7 | -O | Command (IDC Register 7) |
| B7 | I- | Status (IDC Register 8) |
| REMEMOrizer Speculator extras |
|---|
| B0 | I- | REMEMOrizer Speculator sound transition counter (low) |
| B1 | I- | REMEMOrizer Speculator sound transition counter (high) |
| B2 | I- | Video active indicator |
| B2 | -O | Row type and number select |
| B3 | I- | Run size |
| B3 | -O | Clear leftmost cell in run |
| B4 | I- | CPU address low |
| B5 | I- | CPU address high |
| B6 | I- | VDP address low |
| B7 | I- | VDP address high |
| REMEMOTECH specific bells and whistles |
|---|
| C0 | IO | 7 segment digits 1 and 0 |
| C1 | IO | 7 segment digits 3 and 2 |
| C2-C3 | IO | Space left for further 7 segment displays in future |
| C4 | IO | Green LEDs, LEDG7..LEDG0 |
| C5 | I- | Keys, KEY2..KEY0 (KEY3=reset) |
| C6 | IO | Space left for future features |
| C7 | I- | Extra keys, mainly numeric pad |
| C8-CF | IO | Space left for future features |
| REMEMOTECH and REMEMOrizer address mapping |
|---|
| D0 | IO | Page register 1 |
| D1 | IO | Page register 2 |
| D2 | IO | REMEMOrizer page register 3 |
| D3 | IO | REMEMOrizer page register 4, controls ROM 2 sub-page |
| MFX SD Card (FPGA version 1.xx) |
|---|
| D4 | -O | SD control:
| Bit | Function |
| 0-5 | Clock divisor |
| 7 | Card select |
SD clock frequency = 2MHz / (Divisor + 1) |
| D4 | I- | SD status:
| Bit | Function |
| 0 | SD card data out |
| 1-5 | Reserved |
| 6 | Card activity flag |
| 7 | Write status (0 = Busy, 1 = Complete) |
|
| D6 | IO | SD data |
| D7 | I- | SD data, with implied send FF |
| MFX SD Card (FPGA version 2.00 or higher) |
|---|
| D4 | -O | SD control:
| Bit | Function |
| 0-6 | Clock divisor |
| 7 | Card select |
SD clock frequency = 25MHz / (Divisor x Scale + 1) |
| D4 | I- | SD status:
| Bit | Function |
| 0 | SD card data out |
| 1-5 | Reserved |
| 6 | Card activity flag |
| 7 | Write status (0 = Busy, 1 = Complete) |
|
| D5 | IO | SD card mode:
| Bit | Function |
| 0 | SD card clock (bit-bash mode) |
| 1 | SD card data in (bit-bash mode) |
| 2 | SD card select (bit-bash mode) |
| 3-5 | Reserved |
| 6 | SD clock scale (0 = x16, 1 = x1) |
| 7 | Mode select (0 = SPI, 1 = Bit-bash) |
|
| D6 | IO | SD data |
| D7 | I- | SD data, with implied send FF |
| SD Card (REMEMOTECH & REMEMOrizer) |
|---|
| D4 | IO | SD control/status |
| D5 | IO | Space left for future SD card enhancements |
| D6 | IO | SD data |
| D7 | I- | SD data, with implied send FF |
| REMEMOTECH and REMEMOrizer misc stuff |
|---|
| D8 | I- | Clock divider (REMEMOrizer hard codes result of 05) |
| D9 | IO | REMEMOrizer specific flags |
| DA | IO | More REMEMOrizer and REMEMOTECH specific flags |
| DB-DF | IO | Space left for future features |
| MEMU diagnostics (if enabled by -diag-chip-log) |
|---|
| EE | IO | Inserts a character into the MEMU log file.
The following control characters have special effects:
| 0x00 | Disable logging from Z80 |
| 0x01 | Enable logging from Z80 |
| 0x02 | Disable logging of Z80 instructions |
| 0x03 | Enable logging of Z80 instructions |
| 0x0A | Flush a line of Z80 logged data to the file |
|
| EF | IO | Inserts a byte (in hex) into the MEMU log file |
| Speculator (original only) |
|---|
| x11xxxxx | IO | Partial address decode, covers 7E,7F,FB,FE,FF, and maybe more? |
| xxx11111 | IO | Partial address decode, covers 1F, and maybe more? |
| Speculator (original, REMEMOrizer, MEMU) |
|---|
| 1F | IO | Kempston Joystick |
| 7E | I- | Read emulated Spectrum border |
| 7E | -O | Write emulated Spectrum keyboard, first low bit in A15-A8 selects row |
| 7F | IO | Fuller joystick (00 written only, no button pressed) |
| FB | IO | ZX Printer (40 written only, printer not connected) |
| FE | -O | Write emulated Spectrum border |
| FE | I- | Read emulated Spectrum keyboard, first low bit in A15-A8 selects row |
| FF | -O | NMI write register |
| MAGROM |
|---|
| FB | -O | Page register for 512KB data ROM |